Electrical and Computer Engineering

CMPE 410.  Computer Engineering Design I.  Design of computer processing hardware.  Design examples include finite state machines, integer adders and multipliers, datapaths and processor control.  Students will design and implement a special-purpose data processor.  CAD tools for design entry, simulation, synthesis and timing verification.  Use of VHDL.  Implementation with FPGAs.  Three hours a week includes laboratory sessions.  Fall  (Cr.3)  

Prerequisites:  EECE 230  

Course Objectives:   

Students will be able to:   

Understand performance issues that commonly arise in the design of computer hardware,   

Propose and evaluate a variety of design strategies to meet specific requirements,  

Use CAD software to design and implement digital circuits with a programmable logic device,   

Design and implement a processor to perform a given numerical or data processing algorithm.   

Produce clear and comprehensive documentation for a design.                 

Course Syllabus:  

Text:       Logic and Computer Design Fundamentals, Mano and Kime, 2nd ed.,                  Prentice Hall   

Topics:

CAD software for design and implementation of digital circuits using an FPGA.   

Synthesis of combinational logic with VHDL using hierarchical and dataflow descriptions.   

Use of schematic capture, VHDL and library modules to enter designs with memory elements such as flip-flops, counters and registers.   

Avoiding timing hazards, edge-triggered flip-flops, concurrency in VHDL descriptions.   

Design of finite state machines and implementation using VHDL.  (Student design project)   

Use of ROM and look-up tables to implement combinational logic.   

Datapath design including multiplexers, register files, shift registers, ALUs, tristate buffers and BUS transfers.   

Serial and parallel architectures for binary addition and multiplication.  

Control of simple processors using algorithmic state machines and microprogrammed control.   

Design of a processor to implement a specific algorithm.  (A case study and student design project)                   

ABET category content as estimated by the faculty member who prepared this course description:
Engineering Design   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .    3 credit  (100%) 

Prepared by: Bro. Henry Chaya   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Date: June 13, 2001